PowerPC Compiler suite
The compiler suite is part of the new Plan 9, Third Edition.
It includes the source for the
the C compiler, assembler and loader (linker), namely
qc, qa and ql.
It includes the source for PowerPC-specific
parts of the libraries, and a sample Plan 9 kernel port that uses the collection /sys/src/9/mpc.
As with all Plan 9 compilers, it is automatically a cross-compilation suite
when compiled on any existing Plan 9 architecture (mips, sparc, intel, 68020).
The basis for the magic number Q_MAGIC is 21.
The letter is q.
The string is power.
The main restrictions are:
The suite was originally developed and tested on
a 486 by building and using the PowerPC emulator qi.
It has since been used for several years to compile and build
a complete Plan 9 system (on a BeBox), native Inferno kernels for several PowerPC target platforms,
and hosted Inferno (emu) for Plan 9 on the PowerPC.
- The target is the PowerPC in 32-bit, big-endian mode.
- There is no support for the older instructions of the POWER architecture,
including any that refer to the MQ register.
- The assembler qa is missing a few instructions that the loader implements.
- The compiler qc might not always use the elaborate PowerPC
order code to best advantage (eg, floating multiply-add instructions,
and decrement-and-branch), although library routines might use them.
- The loader ql does not attempt instruction scheduling.
The PowerPC interpreter qi will be made available here shortly.
C H Forsyth, 13 June 2000